Agreed – hardware assistance would be a huge boon.

BOUND instruction on x86 architecture exists for time immemorial, but not widely used and may be slow in modern microcode (like AAM/AAD and other stuff of handwritten assembly era, never emitted by compilers).

> …overflow checking has a significant performance cost even when fully optimized.

That surprises me—I would have thought a quick bit-test on the status register and conditional jump wouldn't be all that bad.

> I think what we really need is for the hardware manufacturers to help us out here.

Are you thinking something like a software interrupt on integer overflow?

There's the secondary effects of missed optimisations too: if every operation is checked for overflow, there's much less scope for reordering/collapsing/vectorising operations, (this is also especially important in tight loops where the core loop can easily be less than 20 instructions, so 2 extra is significant).

> if every operation is checked for overflow, there's much less scope for reordering/collapsing/vectorising operations

Lets pretend that instead of "put a conditional jump after every operation", we try to model things as "pretend all integers are infinite precision, blow up if overflow happens at some point". So for example, we would be OK with rewriting

    int x = MAX_INT
    int y = (x + 1) - 1 //overflow - BOOM!

with

    int x = MAX_INT
    int y = x; //no overflow

Yes, this means that the program does different things depending on the level of optimization but are there any reordering/vectorizing possibilities that get blocked now?

> That surprises me—I would have thought a quick bit-test on the status register and conditional jump wouldn't be all that bad.

20%-30% performance loss at least, IIRC.

> Are you thinking something like a software interrupt on integer overflow?

Right.